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Why is Chip Design for IOT so Hard?

Internet-of-Things (IOT) designers face a different set of challenges from their traditional ASIC and SOC brethren. Will the market be ready?

By John Blyler, Editorial Director, IOT Embedded Systems

Quotable Quotes:

  • … we’ll need 10,000 plus IOT designers. Where will they come from?
  • … a majority of IOT designers will have little experienced in traditional SOC design.
  • … SOC industry newcomers will suffer from “new IOT designer anxiety disorder or “New IDeA Disorder”
  • … need modular architectures that are specific to IOT devices.

It’s a daunting task for a non-experienced company to create a custom chip, ASIC or SOC to implement their new “bright idea” IoT product. The company’s engineers face equal challenges in developing, manufacturing, and getting the chip delivered on time. With this introduction, Jim Bruister, President of SoC Solutions, began his talk at the inaugural REUSE show about the overwhelming number of tools, skill sets, costs, IP acquisition and industry associations needed to navigate the chip design and delivery process. He examined how the industry presently supports new chip development and where it needs to go in the future to streamline the process for the non-experienced companies that will no doubt fuel the coming IoT boom.

Bruister started his talk by considering the drivers of IOT in a market predicted to include 20 billion devices by the year 2020. On the business side, IOT will be driven by data and subscription models. But while IOT devices will be enablers for data businesses, the devices won’t be the real money makers. Instead, revenues will flow from data and related analysis. Most of the IOT devices will compete under strong price pressures resulting in cheaper products with tight profit margins.

Further challenging the revenues from physical IOT devices will be the lack of high-end users. For example, many IOT devices will not be fashionable wearables for fitness as most of the world’s population are struggling with basic needs such as indoor plumbing. They have neither the money nor interest in wearable devices. Still, IOT technology will represent a huge electronic market.

“There will be tens of thousands of new IOT businesses in my opinion,” explained Bruister. “This implies at least as many IOT device designers will be needed, or about 10,000 plus. Where will these designers come from?”

It’s reasonable to assume that IOT designers will come from existing system, software, field programmable gate array (FPGA), Printed Circuit Board (PCB) and semiconductor industries. A larger portion will probably come from the FPGA markets while a much smaller amount will come from the semiconductor space.

A majority of IOT companies will be startups, incubated from universities. Naturally, companies will recruit college graduates and interns to do a lot of the work. This means that a majority of designers will have little experienced in traditional SOC design.

“What is the likely approach that these college graduates will take to IOT design,” asked Bruister? His view was that these designers would first turn to Google searches on terms like SOC, chip or ASIC. They will look in trade magazines like EETimes, EDN, Sports Illustrated, Field & Stream and others. They will probably look for SOC experts and semiconductor consultants but there won’t be enough of such gurus to go around.

IP portals like Chipestimate.com, Design & Reuse (D&R) and others will be consulted only if the college graduate IOT designers know about them. Similarly, these designers might even contact a few design houses if they are aware of them.

One of the big challenges will be the difficulty in maneuvering a typical SOC flow with its many critical steps (see Figure 1). Also, there are over 1,200 IP cores from over 400 IP vendors from which the IOT designer must choose, (see Figure 2). He or she will quickly realize that the front-end design tools are quite expensive, e.g., for synthesis, timing, etc. The back-end tools for place and route and packaging are even more expensive and require tools experts just to run them.

Figure 1: Vendor complexity and cost that IOT designers will face for their SOCs. (Courtesy SOC Solutions)
Figure 2: Snapshot of current semiconductor IP vendors.

The challenges of SOC design complexity, numerous IP vendors, varying licensing agreements and expensive front-end and back-end tools will result in a “new IOT designer anxiety disorder or “New IDeA Disorder,” Bruister noted humorously. The IOT designer will be overwhelmed with too much information (TMI). Where can the designer get help?

Bruister believes that practical education is an important missing piece of the IOT design puzzle. The new inductee will need many “How do” guides, e.g., an IOT SOC Design for Dummies book. He or she will need a better place to find information than performing a Google search. Unfortunately, there are just not enough SOC consultants to go around for the 10,000+ designers that will be needed for devices to go into 20 billion products. Instead, IOT designers will need an easy, fast inexpensive way to design a chip from concept to first silicon. This process will require both easy-to-use development platforms and many reference designs to get things started.

Let’s consider a typical SOC architecture containing a CPU, bus structure, peripherals, and interfaces for radios, baseband processing and sensors (see Figure 3). This architecture probably represents about 80% to 90% of those to be used in most small IOT devices.

What is the 10%-20% difference between the different IOT devices? The type of communication to be used will be one difference, for example, Bluetooth, Wi-Fi, proprietary radios or optical methods. Also, IOT devices will probably have different types of sensors such as accelerometers, MEMs, strain gauges, etc. But Bruister believes that the most important differentiator may lie with the power management unit. IOT devices will have a wide range of power duty cycles requiring the devices to turn on every millisecond, minute, hour or even day and then go back to sleep. Thus, power management will have to be customized for each different type of operational requirement.

Figure 3: A typical System-on-Chip (SOC) architecture. (Courtesy SOC Solutions)

All of these challenges mean that the bar on design abstraction must be raised. Modular architectures will need to be specific to IOT devices. This may result in class libraries for hardware.

“I think we need to raise the bar on design abstraction, noted Bruister. “We need modular architectures that are specific to IOT devices. And we need what I call a set of class libraries for hardware for both analog and digital subsystems. These subsystems will be abstracted away to make it easier for IOT designers to plug play amongst these different models. Also, there will need to be complementary software abstractions, e.g., APIs, HAL layers and such. Design abstractions are common in Arduino and Raspberry Pi platforms.”

The good news is that many of the pieces to create a successful IOT ecosystem are in place. There is a large selection of quality IP suppliers, many of which attended REUSE 2016. Complementing the IP vendors are a number of design houses with a lot of good experience and solutions, noted Bruister. Silicon aggregators like eSilicon and the foundries necessary to actually build the 20 billion IOT devices round out the existing ecosystem.

Part II of this article will examine ways for the semiconductor and electronics industries to improve the design process for the next generation of IOT designers.

Originally posted on EE Catalog

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