Tag Archives: Xilinx

Xilinx in space; lenssless optics; the AMBA coherent host interface; the downside of silos; vertical companies; gender inequity; PCIe Gen 4; and the de-evolution of the SoC

Buffer, and ADC design considerations; all about timing specifications; portable stimulus; Star Trek and the IoT; the Wilson Group's functional verification study; RTOS performance; the Silicon Valley age gap; temperature and humidity sensors; requirements management; and the oft-dreaded question "What do you do for a living?"

Arduinos; software defined networks… and radios!; ARM/AMBA; TLS engines; embedded industrial automation; system-level power modelling; and collaborating more effectively by Hamilton Carter – Senior Editor If you like to play at your engineering, you should know a new version of the Arduino IDE has been released! Interested in software defined networking—SDN? Check out this Xilinx enabled kickstarter. ARM contributes to …

by Hamilton Carter, Senior Editor   The first post-acquisition Jasper User Group (JUG) conference was heldlast Monday and Tuesday in Santa Clara California.  Cadence’s Executive Vice President of the System and Verification Group, Charlie Huang, and Jasper’s Oz Levia each spoke about how the new Jasper products fit into the Cadence system verification flow.     Ron Wilson, of Altera discusses …