Tag Archives: Synopsys

A panel representing automotive, semiconductor, software and systems experts met to share insights on the hardware-software challenges of ISO 26262 compliance.

Achieving the lowest digital and analog system power on a single IoT chip requires re-architecting and optimization.

Debugging the debug process; homing in on UPF; sound digitization schemes; unit testing assertions; occupant aware homes; embedded system-level verification; the unexpected consequences of uninitialized variables; and glow-in-the-dark DDR4.

The benchmarking organization seeks to create performance tests for the edge of the Internet of Things (IoT). By Chris Edwards, Tech Design Forum Benchmarking organization EEMBC has kicked off an effort to develop a set of performance tests for edge nodes for the Internet of Things (IoT). Focus on the energy efficiency of edge nodes, the benchmarks will build on …

High-level synthesis in design and verification, layering UVM constraints, FORTRAN? still?, parallel algorithms, two new (and free!) VIPs from AMIQ; the NVMe SSD standard; and Apple batteries and the IoT

UVM platform specifics and coding examples; ringing MOSFETs; the capture, care, and upkeep of young engineers; post-DVCon coverage, and building vs. Jaguar

Water Heaters; Flying Functional Covergage; USB; Firmware IP; DeflateGate and engineering; Unicorns and Androids

Experts from Synopsys, Imagination Technologies, and Silicon Labs expand on what they saw at CES 2015 and what it means for hardware and software IP subsystem designers. by Hamilton Carter, Senior Editor The shorter market windows associated with burgeoning IoT and entertainment product offerings are creating new challenges for hardware and software IP designers alike.  We spoke with Eric Huang, …

Android assembly programming, Sample and Hold Time for Dummies, near field communications, and the secret origin of the Udacity functional verification course By Hamilton Carter, Senior Editor The Altera SoC FPGA was selected for Audi’s advanced driver assistance system, (ADAS). How to program in assembly on an ARM/Android device. Mentor’s Josh Rensch provides quirky, irreverent advice on how design and …

In Part II of this story, Cadence, Synopsys and Imperas offer challenges that hardware and software designers will face in verifying system requirements.