Tag Archives: semiconductor

Will Generative AI Play a Leading Role in Chip Design and Manufacturing?

Opinions vary widely on why AI for EDA IP chip design is not ready for prime time, from evolving standards, IP security, geopolitics, and robust manufacturing and packaging.

As in previous years, AI is a big topic in the semiconductor EDA IP chip design space. This year, though, many experts see clear challenges that must be overcome before the technology becomes mainstream. However, those companies that successfully address these issues early on will gain a crucial advantage in improving chip designer productivity and innovation on both existing products …

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SEMI Oregon Breakfast Forum: Wearable Electronics – Challenges and Opportunities

SEMI Pacific NW Oregon Forum

Attention – Electronics and semiconductor professionals in the Pacific Northwest! SEMI is having another half-day breakfast forum. Wearable devices have challenging requirements for power consumption, compactness, lightweight, low cost, high flexibility, ease-of-use, durability, and conformability. This technical forum will address and highlight recent advances, key challenges, current solutions, and future opportunities for wearable and flexible electronics. Presented by the SEMI …

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REUSE 2017

REUSE 2017 - Dec. 14th at the Santa Clara Conv. Center - brings together the diverse global intellectual property (IP) community of designers and suppliers of the semiconductor industry.

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REUSE 2017 Tackles Semi IP Theft and Open Hardware

Keynote will highlight IP theft and prevention while afternoon panel wrestles with semi open source hardware reuse and IP. By John Blyler, Editorial Director, JB Systems The continued growth of semiconductor intellectual property (IP) is critical for the health of the EDA chip development and tools markets. This point was emphasized by Laurie Balch, Chief Analyst at GSEDA, during this year’s …

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