Tag Archives: NXP

IP Systems Blog Review – Sunday May 10, 2015

Debugging the debug process; homing in on UPF; sound digitization schemes; unit testing assertions; occupant aware homes; embedded system-level verification; the unexpected consequences of uninitialized variables; and glow-in-the-dark DDR4.

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IP Systems Blog Review – Tuesday January 20, 2015

Android assembly programming, Sample and Hold Time for Dummies, near field communications, and the secret origin of the Udacity functional verification course By Hamilton Carter, Senior Editor The Altera SoC FPGA was selected for Audi’s advanced driver assistance system, (ADAS). How to program in assembly on an ARM/Android device. Mentor’s Josh Rensch provides quirky, irreverent advice on how design and …

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