Tag Archives: Cadence

Buffer, and ADC design considerations; all about timing specifications; portable stimulus; Star Trek and the IoT; the Wilson Group's functional verification study; RTOS performance; the Silicon Valley age gap; temperature and humidity sensors; requirements management; and the oft-dreaded question "What do you do for a living?"

Arduinos; software defined networks… and radios!; ARM/AMBA; TLS engines; embedded industrial automation; system-level power modelling; and collaborating more effectively by Hamilton Carter – Senior Editor If you like to play at your engineering, you should know a new version of the Arduino IDE has been released! Interested in software defined networking—SDN? Check out this Xilinx enabled kickstarter. ARM contributes to …

Android assembly programming, Sample and Hold Time for Dummies, near field communications, and the secret origin of the Udacity functional verification course By Hamilton Carter, Senior Editor The Altera SoC FPGA was selected for Audi’s advanced driver assistance system, (ADAS). How to program in assembly on an ARM/Android device. Mentor’s Josh Rensch provides quirky, irreverent advice on how design and …

TSMC; FTC on Privacy; ARM Consolidation, Cars & Ships: Atmel MCUs; Green Hills and NVIDIA; Matrix Spying; Standards; Cadence IP/IoT; Monotype; Marvell Homes

Engineering Resolutions; Vehicle Comm.; Chip-Level Security; UVM; Data Man. Report; Verifying Si; VCOs, Low-Power DDR4; IoT Regulations; Transformers.

The holidays aren’t over yet!  Mentor’s Boris Marovic considers the science behind Santa.  Alien technology abounds. Follow an ex-Sparkfun engineer in his travels across Africa spreading robotics. Jama moved into a new headquarters for the new year! Things are a bit slow what with all the mandatory holiday shutdowns.  Here’s some fun holiday reading about the Blocks for the Intel …

In Part II of this story, Cadence, Synopsys and Imperas offer challenges that hardware and software designers will face in verifying system requirements.

IoT system-level modeling and prototyping challenges are examined by ARM, Mathworks, Cadence, Synopsys, Analog Devices, Atrenta, and STMicroelectronics.

Kickstarter Projects, Code Coverage, Specman, IP Verification, MOOC, Automotive, Mixed Signal, Conflict Free and IGBT.

by Hamilton Carter, Senior Editor Part 3 of the Specman reflection API blogs from Cadence is out. Once again, if you like building meta-tools, this API is for you! For example, want to build a memory profiler with functionality not built into the tool? The power lies within the reflection API.   Linda Qian of Intel briefs us on Intel’s …