Tag Archives: Amiq

A common coding practice can lead to product efficiency but also software maintenance nightmares and technical debt.

Debugging the debug process; homing in on UPF; sound digitization schemes; unit testing assertions; occupant aware homes; embedded system-level verification; the unexpected consequences of uninitialized variables; and glow-in-the-dark DDR4.

Big data and verification; reading design specs; all-digital radio; protocols: WiGig and HART; more from the Wilson verification study: FPGAs; the Studebaker plant gets a new lease on life; verification sequence portability; NASA space apps; draw a barn with SystemVerilog constraints; Industrial automation and the IoT; and upcoming events

High-level synthesis in design and verification, layering UVM constraints, FORTRAN? still?, parallel algorithms, two new (and free!) VIPs from AMIQ; the NVMe SSD standard; and Apple batteries and the IoT

Water Heaters; Flying Functional Covergage; USB; Firmware IP; DeflateGate and engineering; Unicorns and Androids

by Hamilton Carter Senior Editor Altera’s Ron Wilson lays out the consequences and opportunities of what he calls the flash revolution.  Find out what stackable flash memory cells portend for your industry.   Amiq’s Stefan Birdman reports on the inaugural DVCon Europe.  Get a Birds-Eye View of Stefan’s experience there and the cool things he found.   Mentor’s Colin Walls …

by Hamilton Carter, Senior Editor Part 3 of the Specman reflection API blogs from Cadence is out. Once again, if you like building meta-tools, this API is for you! For example, want to build a memory profiler with functionality not built into the tool? The power lies within the reflection API.   Linda Qian of Intel briefs us on Intel’s …