The following is an interview that John Blyler, EiC for Chip Design, conducted with Dr. Gary Ray from the Boeing Corporation. [Note: These comments represent the opinions of Dr Ray, not the Boeing Corporation.]
[JB] Last year your wrote an article for Chip Design titled, “The Mysteries of Reproducible Design.” http://www.chipdesignmag.com/display.php?articleId=1675&issueId=24 Would you summarize that article to serve as a starting point for this discussion.
[GR] “Reproducible research” is a new topic in the areas of signal processing and computer science. The idea is that when a paper is published, any one who reads that paper can find all the information necessary to reproduce the results. “Reproducible design” is then the same idea applied to hardware.
[JB]: Is that similar to intellectual property, or very different?
[GR] What it means in the research arena is that when I publish a paper, I make available all the software I used and every parameter so that anyone else could reproduce all the graphs and results contained in the paper.
When this is applied to HW (specifically chip design), it means that anyone should be able to reproduce your results if they went to the trouble of designing their own chip with all the information supplied by the researcher.
“Reproducible design” is kind of like open source for hardware on steriods
[JB] Do you follow the ESL process in creating this reproducible design?
[GR] My article was speculative because I don’t know of anyone that takes hardware research to this level. It’s still a very new concept.
[JB] Do you use EDA tools for your reproducible design?
[GR] Just like open source uses GNU, you would have to use open source EDA tools to achieve reproducible design. They are not as well developed as the GNU suite for software, but they are coming along nicely. One website is: http://geda.seul.org/
The promise is that just with open source multiplying the ability of people everywhere to collaborate, reproducible design would allow people to collaborate on hardware instead of having the designs all be proprietary. Great promise, but hard to change the culture.
[JB] What is the greatest challenge with coming up with a reproducible design?
[GR] For an employee, it is almost certainly the proprietary nature of HW within almost every company. For a student, it is easier. In the university setting, it would involve deciding on a standard set of open source HW tools and creating designs together with all their attendant data and publishing it along with the research. This is hampered by the lack of a “GNU” standard.
The main difficulty from the tools side is that they are not as robust and complete as GNU compilers and such. I think that we would need a Richard Stallman for EDA. Richard Stallman started the open source revolution at MIT. He started GNU (emacs, gcc, etc)
[JB] Does virtual prototyping bring us closer to reproducible design? I don’t mean from a software side, but from the high-level simulation of hardware.
[GR] I guess it would help, if there was a standard suite of virtual prototyping software. Is there?
[JB] Not really. Not yet.
[GR] A problem with reproducible design is you need a single set of tools that everyone has, otherwise it is too hard.
[JB] Each company has their own system: Synopsys with Virtio, VaST, Virtutech, CoWare, ARM (Realview), etc. The common format would be like a gerber file in board design, correct? Except not a Gerber file, which only contains the patterns for drawing printed circuit boards. More like a std IP format, or perhaps an IP interface format (like the VSIA was working on).
[GR] Yes, if you have a low level file format that everyone accepts, that is a start. But in EDA there is often so much more that it required to reproduce some one’s actual results in HW. Yes, standard IP would be necessary
[JB] Well, it won’t necessarily have to be timing accurate. you could keep the tools at an hw-sw architectural level. as in pre-partitioning trade off analysis.
[GR] It would have to be timing accurate if the claims were related to performance.
[JB] But then you start getting into very specific detail about the hardware (RTL). Perhaps you could benchmark a set of standard RTL libraries for common functions, like 32-bit processors, cache memory, buses, std video encode/decode. Don’t those files already exist?
[GR] I don’t think there are complete open source RTL libraries for all those things. There are some things on that website I mentioned. An interesting fact: A few month’s ago Sun open sourced their Ultrasparc CPU. It is 8 core I believe, with the next one being 64 core. They use a “T” nomenclature: T1, T2, etc. Here’s the info: Sun provides the OpenSPARC T2 and OpenSPARC T1 register transfer level processor designs to the open source community via the GPL license. http://www.sun.com/featured-articles/2008-0401/feature/index.jsp
[JB] Has anyone else done that? Intel with the 8051 microcontroller? or any of the older ARM processors?
[GR] Not that I know of. The ARM is such a money maker, I can’t imagine.