Android assembly programming, Sample and Hold Time for Dummies, near field communications, and the secret origin of the Udacity functional verification course
By Hamilton Carter, Senior Editor
The Altera SoC FPGA was selected for Audi’s advanced driver assistance system, (ADAS).
How to program in assembly on an ARM/Android device.
Mentor’s Josh Rensch provides quirky, irreverent advice on how design and verification engineers might be made to get along better. It sounds crazy, but it just might work.
Read up on three of the most notable formal verification papers of 2014. Killer cache bugs were found by Oracle. Qualcomm outlines their methodology for automating coverage checking.
Vehicle to vehicle communications will utilize a flavor of the WiFi 802.11 protocol, specifically 802.11p. The range is impressive compared to laptop services: about a mile. NXP’s Drue Freeman covers the basics.
Silicon Labs interviewed Nick Palladino, @shifthack, who has created a solar powered video game console that fits inside an Altoids tin!
Cadence’s Uwe Simm, details Cadence’s new testcase optimizer. It’s not what you think. This tool allows you to generate an incident report for an issue with Cadence’s software that won’t make your manager blush, i.e. it finds the simplest way to cause the issue without involving your design’s source code.
If you’re new to chip design, or try to not be in the room when the phrase ‘sample and hold time’ comes up, this introduction to clock data recovery might be just the thing.
Near Field Communications are here to stay. Review ten interesting applications of the technology with NXP’s Sylvia Kaiser-Kershaw.
Synopsys’ Mick Posner describes the many sensors used in products he saw at CES. He talks a bit about the PMOD bus for interfacing sensors to FPGA systems.
Cadence’s Brian Fuller and Chris Rowen, (IP Group CTO), walk the floor of CES and discuss the future of electronic system design.