Home » IP Systems » IP Systems Blog Review – Tuesday February 24, 2015

IP Systems Blog Review – Tuesday February 24, 2015

Buffer, and ADC design considerations; all about timing specifications; portable stimulus; Star Trek and the IoT;  the Wilson Group’s functional verification study; RTOS performance; the Silicon Valley age gap; temperature and humidity sensors; requirements management; and the oft-dreaded question “What do you do for a living?”

By Hamilton Carter – Senior Editor

Here’s a nicely detailed buffer design article.  Freescale’s Sachin Kalra discusses the tradeoffs between designing to avoid hold violations and keeping power consumption low by reducing a buffer’s IR drop.

Cadence’s Seow Yin Lim, wonders where her Star Trek lifestyle went.  She lays out a cogent framework for developing the IoT devices that really will go viral.

Verification stimulus that is truly portable from platform to platform has been a holy grail for years.  Cadence’s Richard Goering details some of the work being done by Accellera to realize the dream.

Learn all about clock jitter and analog to digital converter performance from Analog Devices.  This one hits close to home for me, (I’ve spent a few hours watching outputs twitch rhythmically on a scope screen in sync with the noise from the pump across the room).


If you’re headed to DVCon this year, Mentor’s Matthew Balance has pointed out a presentation on portable stimulus reaching all the way up to SystemC.

Xilinx’s Adam Taylor posted a primer on specifying timing constraints.  It’s ostensibly for FPGA design, but the generic knowledge is great for anyone wanting to add a few more design cards to their deck.

You might remember that a few weeks ago Mentor’s Harry Foster posted a primer on how to read studies.  Here’s part one of his coverage of the study he had in mind, the 2014 Wilson Research Group Functional Verification Study.

If you’re going to be in the Nuremberg area this week, you should check out Embedded World—purported to be the world’s largest embedded conference.  Mentor’s Colin Walls will be presenting on RTOS performance and embedded system self-test.  His column includes a bit of a preview.

Here’s a spiffy little temperature/humidity based switch from Silicon Labs.  The post is complete with schematics and a construction video.


IPextreme on the apparent age gap in silicon Valley and what should be done about it.

Gartner reveals that up to 50% of engineering and software companies are still using ‘Office’ caliber software to manage requirements.  Here are some pointers on how to choose a tool actually designed for requirements management that might better suit your needs.

Here’s a chance to commiserate over the age old question, “What do you do for a living?”  This well written post is both cathartic and inspiring!

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