Home » IP Systems » IP Systems Blog Review – Friday January 2, 2014

IP Systems Blog Review – Friday January 2, 2014

The holidays aren’t over yet!  Mentor’s Boris Marovic considers the science behind Santa.  Alien technology abounds.

Follow an ex-Sparkfun engineer in his travels across Africa spreading robotics.

Jama moved into a new headquarters for the new year!

Things are a bit slow what with all the mandatory holiday shutdowns.  Here’s some fun holiday reading about the Blocks for the Intel Edison, a set of small hirose pluggable embedded building blocks.  There’s an effort to make the “Wolfram Language” available for use with Intel Edison.  Here’s the getting started site for the language.

If you live and breathe verification, even during the holidays, there’s good news!  Mentor’s latest issue of “Verification Horizons” is out.  It includes an interesting and fairly extensive article on cache coherent interface verification by Amit Kumar Jain.

Intel takes a look at how WiFi technology is changing to keep up with demand.

Altera demonstrates FPGAs that can utilize DDR4 data rates.

Cadence’s Daniel Bayer gives some of the inside skinny on Specman’s IntelliGen constraint solver.  Contains sample code and examples.

Microsoft Windows 10 is on its way.  Here’s what Intel thinks you should know about it.

The sixth Cadence Front-End Design Summit, took place a few weeks ago just as California was doing significant work on ending its drought.  If you weren’t on the West Coast, or stayed in due to rain, not to worry, Cadence has posted several of the presentations for your leisurely viewing pleasure.

If you’re interested in gender imbalance in the engineering fields, have kids, or would just like to expand your horizons in the fluid dynamics direction, check out Keith Hanna’s “CFD [Computational Fluid Dynamics] –Toys for Boys?

Simulators: they’re not just for chip design anymore.  Intel considers applying compute power and simulator technology to other business ventures.

Finally, on the subject of simulators:  There’s been a new update of the UVM/ML (multi-language) Open Architecture Library.  If you’re interested in linking verification platforms with different languages, SystemC for example, this is a good place to start.

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